1. Field of the Invention
The present invention relates to a contact in a multi-layered structure of a highly-integrated semiconductor device for electrically connecting conductive lines arranged on the upper and lower portions of an interlayer-insulating film, and more particularly to a contact of a semiconductor device, which partially overlaps an upper conductive line for increasing packing density of the semiconductor device, and a method for manufacturing the same.
2. Description of the Prior Art
In the multilayered structure of semiconductor devices, a conventional contact for electrically connecting upper and lower conductive line patterns arranged on the upper and lower portions of an interlayer-insulating film is designed to completely overlap the upper conductive line pattern. Also, in order to fully overlap the contact, the upper conductive line pattern must be wider than the lower conductive line pattern. The upper conductive line pattern wider than the lower conductive line pattern increases the unit area of circuit devices included in the semiconductor device to result in decreasing packing density of the semiconductor device. The complete overlapping of the contact with the upper conductive line pattern is caused by its manufacturing process of stacking an interlayer-insulating film having a contact hole in the lower conductive line pattern, forming a conductive layer on the interlayer-insulating film and in the contact hole, and forming the contact and upper conductive line pattern by patterning the conductive layer. Moreover, the width of the upper conductive line pattern is further increased owing to linewidth deviation and misalignment margin of a mask, which occur during formation of the conventional contact.
FIG. 1 illustrates a layout of a semiconductor device having a bitline pattern 10 overlapping a contact 12. The portion of the bitline pattern 10 overlapping the contact 12 is wider than an impurity diffusion region 14 formed on the lower portion of the semiconductor device. Because of the width of the bitline pattern 10 exceeding the area of the impurity diffusion region 14 which serves as a lower conductive line pattern, the packing density of the semiconductor device is restricted.
Furthermore, the method for forming the contact of the conventional semiconductor device is disadvantageous in that, when the contact 12 is intended to partially overlap the bitline pattern 10 on the upper portion thereof, the impurity diffusion region 14 being the lower conductive line pattern is damaged.